TITLE

Efficient On-Chip Crosstalk Avoidance CODECs using FTF-FNS

AUTHOR(S)
J., Venkateswara Rao; P., Sudhakara Rao
PUB. DATE
December 2012
SOURCE
International Proceedings of Computer Science & Information Tech;2012, Vol. 55, p137
SOURCE TYPE
Academic Journal
DOC. TYPE
Article
ABSTRACT
VLSI design has marched into the realm of Deep Submicron (DSM) processes, where the minimum feature size is well below 1 μm. These advanced processes enable designers to implement faster, bigger and more complex designs. Integrated Circuit(IC) design has seen a revolutionary progress in the past two decades with shrinking sizes of VLSI fabrication processes. This has an advantage of fabricating millions of transistors in a single chip IC. On the other hand it also creates many challenges in Deep Sub-Micron (DSM) technologies. One of the greatest challenges in DSM designs is inter-wire crosstalk, which becomes significant due to coupling capacitance between wires. The effect of inter wire crosstalks that it greatly limits speed and increases power consumption of IC. This paper focuses on design and implementation of an efficient CODEC which uses Forbidden Transition Free (FTF), Fibonacci based Number System (FNS) for bus encoding. Our approach of CODEC design greatly increases the speed (approximately greater than 2.5 times) and decreases the power consumption with the best existing technologies.
ACCESSION #
94075289

 

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